Accompanying with the improvement of electronic technology, especially the popularity of portable electronic products in daily life, there is an increased demand for light, compact and low power consumption display devices. Since a liquid crystal display has the merits of low power consumption, compact and light, it is suitable for this kind of electronic products and even gradually replaces conventional cathode ray tube (CRT) devices.
Since the pixel aperture ratio is an important factor that has an effect on the characteristics of liquid crystal displays, several kinds of pixel structures have been proposed so far to increase the pixel aperture ratio. Referring to FIGS. 1 and 2, FIG. 1 shows a plan view of a conventional pixel structure with high aperture ratio while FIG. 2 shows a cross-sectional view taken along the line II′-II′ of FIG. 1. The pixel structure 9 includes two gate lines 91a, 91b and one conductive line 92 formed parallel in a row, and includes two data lines 93a, 93b perpendicular to the gate lines 91a, 91b and the conductive line 92, wherein the conductive line 92 has a first part 92a serving as a common line and has a second part 92b serving as a storage capacitor, and the width of the second part 92b is larger than that of the first part 92a. The two gate lines 91a, 91b and the two data lines 93a, 93b define a pixel region.
A thin film transistor 95 is disposed adjacent to an intersection of the gate line 91a and the data line 93a and includes a gate electrode extended from the gate line 91a, a semiconductor layer 951 formed above the gate electrode. An insulating layer 98 is sandwiched between the semiconductor layer 951 and the gate electrode, as shown in FIG. 2. A source electrode 953 and a drain electrode 952 are overlapped with portions of two sides of the semiconductor layer 951 respectively. An organic insulating layer 97 is formed over the pixel region and a pixel electrode 96 is further stacked thereon. A contact hole 99 is provided through the organic insulating layer 97 so as to electrically connect the pixel electrode 96 to the source electrode 953, wherein the pixel electrode 96 is overlapped with the two gate lines 91a, 91b and the two data lines 93a, 93b respectively, thereby increasing the aperture ratio of the pixel structure 9.
However, according to the above pixel structure 9, an organic insulating layer 97 is disposed to decrease the parasitic capacitance Cpd existed between the pixel electrode 96 and the data lines 93a, 93b, thereby reducing crosstalk. Referring to FIG. 3, it shows the connection between capacitors in a pixel region. With reference to this drawing, the coupling ratio of the data lines 93a, 93b in a single pixel region can be obtained as (Cpd1+Cpd2)/[(Cpd1+Cpd2)+Cst+Clc+(Cgs+Cpg)], wherein the pixel region is defined by two adjacent gate lines 91a, 91b and two adjacent data lines 93a, 93b, (Cpd1+Cpd2) is the parasitic capacitance induced by the overlapping of a pixel electrode with two data lines of this pixel region, Cst is the storage capacitance of the pixel region, Clc is the capacitance of liquid crystal unit, Cgs is the parasitic capacitance between a gate electrode and a source electrode of the thin film transistor, Cpg is the capacitance between a pixel electrode and a gate electrode of the thin film transistor. If the coupling ratio in a single pixel region becomes smaller, the crosstalk becomes smaller. Also, according to the above equation, the coupling ratio can be reduced by decreasing the value of (Cpd1+Cpd2) or by increasing the value of Cst.
Referring to FIGS. 1 and 2 again, although the parasitic capacitance Cpd between the pixel electrode 96 and the data lines 93a, 93b can be reduced by disposing an organic insulating layer 97 in the pixel structure 9, the storage capacitance Cst between the pixel electrode 96 and the second part 92b of the conductive line 92 will also be reduced simultaneously. Therefore, the coupling ratio in a single pixel region is not able to be efficiently reduced.
Accordingly, there exists a need for a pixel structure of a liquid crystal display panel capable of solving the above-mentioned problems.